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Role Description

Condor is pleased to announce an exciting opportunity for a Senior RTL/Digital Design Engineer to join our team. This role offers the chance to collaborate with a talented group of architects, designers, and DV engineers as we develop the next generation of RISC-V CPUs.

• Defining architectural frameworks
• Crafting microarchitectural designs
• Engaging in RTL design
• Enabling verification processes
• Establishing design practices that ensure first-pass success

Qualifications

• A Master’s or Bachelor’s degree in electronic/electrical engineering or computer science
• 8+ years of experience in RTL Digital Design
• Experience in TL, microarchitecture, and architecture with advanced microprocessors and/or SOCs
• Strong microarchitecture and logic design experience, including high-speed deep sub-micron design and techniques for low power management
• A solid understanding of computer architecture
• Knowledge of physical timing in silicon devices and timing constraints for industry-standard EDA tools
• Familiarity with design tools for simulation, debugging, synthesis, timing analysis, and front-end RTL checking tools (like Lint, CDC/RDC, LEC, etc.)
• Experience with ASIC design techniques, pipelines, and basic CPU microarchitecture
• Experience in synthesis, physical layout concepts, static timing analysis, and clock domain crossing
• Proficiency in Verilog and System Verilog
• Strong skills in Unix and scripting languages such as make, Shell, Perl, or Python

Requirements

• Strong written and verbal communication skills
• Good cross-site and cross-functional execution abilities

Company Description

Condor Computing is a brand-new member of the RISC-V revolution, aiming to build the industry’s highest performance licensable RISC-V core. Our team of highly experienced CPU designers will create a new benchmark for power efficiency in high performance open-source computing.