Verification Engineer
Location
United States
Posted
4 days ago
Salary
$160K - $220K / year
Seniority
Lead
Job Description
Job Requirements
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field
- 7+ years of experience in digital design verification
- Strong hands-on experience with UVM-based or similar verification methodologies
- Proficiency in SystemVerilog, UVM, and Python
- Experience with industry-standard EDA tools (e.g., Synopsys VCS, Siemens/Mentor Questa, Cadence Xcelium)
- Solid understanding of digital design fundamentals
- Experience verifying standard bus and interconnect protocols such as AXI, AXI-S, and APB
- Experience with high-speed communication protocols including PCIe, Ethernet (10G/40G/100G), SPI, and I²C
- Strong analytical and problem-solving skills
- Clear written and verbal communication skills for cross-functional collaboration
- High attention to detail and ability to deliver reliable, high-quality verification outcomes
- Ability to work independently and manage tasks to completion
Benefits
- meaningful equity
- benefits
- 401(k)
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